• Anytime
    Application Deadline
  • 21 days
    Duration
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Overview

The complexity of digital logic designs requires understanding of large scale devices such as Field Programmable Gate Arrays (FPGAs) to realize solutions.  Implementation in discrete components is nearly impossible to realize and debug due to the growing complexity of solutions.  Integration of processor capability into one platform enables reduction in size and conservation of power with improved microelectronic hardware. 

Hands on bring up of DE10-Lite board with expansion into the use of the VGA output interface is provided.  Focus on the use of the NIOS II processor to control Video IP for generation of test pattern output after reviewing the sample test pattern demonstration in Verilog.  Review of the manual for the implementation of Video IP for display of signals using the Avalon-ST streaming protocol is covered.  

Tools for the design of systems are provided with this Expanded FPGA Training with NIOS II offered by Coursera in partnership with University of Colorado Boulder which include the System Console and TCL scripts for evaluation of board and processor interfaces with custom project, and an embedded Logic Analyzer for probing of signal values to characterize performance and state transition.  A traffic light controller and thunderbird tail lights are used to provide hands-on examples.

What you will learn

  • Apply FPGA design and implementation to engineering problems/challenges.
  • Understand the components of a soft core processor system inside an FPGA and apply this understanding to a project.
  • Categorize the types of external memory interfaces supported by FPGA devices.
  • Employ computer aided design tools to design, verify, and implement embedded systems.

Detailed Programme Facts

  • Deadline and start date A student can apply at any time for this programme, there is no deadline.
  • Programme intensity Part-time
    • Average part-time duration 21 days
    • Duration description
      • Approx. 14 hours to complete
      • Suggested: 3 weeks of study, roughly 6 hours/week if you have the necessary prerequisities
  • Languages
    • English
  • Delivery mode
    Online
  • More information Go to the programme website

Programme Structure

Courses include:

  • Hardware setup and verification for DE10-Lite with VGA monitor output
  • Methods and approaches for testing FPGA designs
  • NIOS II IP for Video and Performance Monitoring

English Language Requirements

This programme may require students to demonstrate proficiency in English.

General Requirements

Intermediate Level

  • Experience with IDE environment for Digital Design, C programming, motivation to complete hands on projects.

Tuition Fee

7-day Free Trial
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Funding

Coursera provides financial aid to learners who cannot afford the fee. Apply for it by clicking on the Financial Aid link beneath the "Enroll" button on the left. You’ll be prompted to complete an application and will be notified if you are approved. 

Studyportals Tip: Students can search online for independent or external scholarships that can help fund their studies. Check the scholarships to see whether you are eligible to apply. Many scholarships are either merit-based or needs-based.

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