Digital System Design Using Verilog HDL for FPGA Implementation

Overview

What you will study

The Digital System Design Using Verilog HDL for FPGA Implementation course offered by University Teknologi PETRONAS offers a deep foundation in FPGA principles, practices, and applications and provides an overview of more complex topics in research domain. Important concepts are demonstrated by using real-world examples and synthesizable codes for inexpensive FPGA platforms such as Arty-7 boards.

It will familiarize the audience with the basics of digital design, FPGA architecture, block RAM, FPGA clock management, and Verilog HDL. The following book is recommended for post-course reference: Digital System Design with FPGA: Implementation Using Verilog and VHDL, 1st Edition by Cem Unsalan and Bora Tar.

Upon completion of this course, participants will be able to:

• Develop intermediate skill in digital design using Verilog HDL.

• Modelling a digital system in Verilog HDL using FSM and ASMD 

• Estimate speed, resource utilization, and power of a FPGA-based design 

• Simulate, synthesize, implement, and program a design in FPGA